VLSI implementation for HVRI algorithm in pattern recognition

Author

Tang, Yuan Y. ; Li, Tao ; Lee, Seong-Whan

Author_Institution

Dept. of Comput. Sci., Concordia Univ., Montreal, Que., Canada

fYear

1993

fDate

20-22 Oct 1993

Firstpage

460

Lastpage

463

Abstract

A VLSI architecture to implement the horizontal- vertical region integration (HVRI) algorithm has been designed. The HVRI algorithm transforms a multi-contour pattern into a unique outer contour. It is applicable to a wide range of areas such as image analysis, pattern recognition, etc. A linear array has been designed based on a canonical methodology which maps homogeneous dependence graphs into processor arrays. An N/2-element vector is used to process a pattern with a size of N×N. It can speed up the recognition process considerably with a time complexity of O(N) compared with O(N²) when a uniprocessor is used

Keywords

VLSI; computational complexity; pattern recognition; VLSI architecture; canonical methodology; homogeneous dependence graphs; horizontal- vertical region integration; image analysis; linear array; multi-contour pattern; pattern recognition; processor arrays; time complexity; Algorithm design and analysis; Computer architecture; Computer science; Hardware; Image analysis; Machine intelligence; Parallel processing; Pattern recognition; Vectors; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Document Analysis and Recognition, 1993., Proceedings of the Second International Conference on

Conference_Location

Tsukuba Science City

Print_ISBN

0-8186-4960-7

Type

conf

DOI

10.1109/ICDAR.1993.395695

Filename

395695