Title :
FPGA implementation of IEEE 802.15.3c receiver
Author :
Véstias, Mário ; Sarmento, Helena
Abstract :
This paper presents the implementation of the OFDM demodulator and the Viterbi decoder, proposed as part of a wireless High Definition video receiver to be integrated in an FPGA. These blocks were implemented in a Xilinx Virtex-6 FPGA. The complete system was previously modeled and simulated using MATLAB/Simulink to extract important hardware characteristics for the FPGA implementation.
Keywords :
OFDM modulation; Viterbi decoding; demodulators; field programmable gate arrays; high definition video; personal area networks; radio receivers; FPGA implementation; IEEE 802.15.3c receiver; OFDM demodulator; Viterbi decoder; Xilinx Virtex-6 FPGA; hardware characteristics; wireless High Definition video receiver; Decoding; Field programmable gate arrays; IEEE 802.15 Standards; Receivers; Streaming media; Viterbi algorithm; Wireless communication;
Conference_Titel :
Consumer Electronics (ISCE), 2012 IEEE 16th International Symposium on
Conference_Location :
Harrisburg, PA
Print_ISBN :
978-1-4673-1354-4
DOI :
10.1109/ISCE.2012.6241728
