DocumentCode :
2632271
Title :
FPGA Implementation of a Multi-Rate Punctured Viterbi Decoder Compatible with the DVB-T Standard
Author :
Abdellatif, Ahmad Anwar ; Ismail, Samar Moustafa ; Korzec, Darek
Author_Institution :
Dept. of Electron. & Electr. Eng., German Univ. in Cairo, Cairo
fYear :
2008
fDate :
16-19 Dec. 2008
Firstpage :
100
Lastpage :
105
Abstract :
In this paper, a field programmable gate array (FPGA) implementation of a Viterbi decoder using register exchange algorithm (REA) is presented. The REA offers a higher operating frequency than its competitor the trace back algorithm (TBA). The proposed design is compatible with the digital video broadcasting for terrestrial networks (DVB-T). The design uses less area and operates at a higher frequency than the existing designs. A multirate de-puncturing unit is integrated in the design to support five code rates of 1/2, 2/3, 3/4, 5/6, 7/8, which are adopted by the DVB-T standard.
Keywords :
Viterbi decoding; codecs; digital video broadcasting; field programmable gate arrays; DVB-T standard; FPGA; digital video broadcasting for terrestrial networks; field programmable gate array; multirate depuncturing unit; multirate punctured Viterbi decoder; register exchange algorithm; trace back algorithm; Block codes; Code standards; Convolutional codes; Decoding; Digital video broadcasting; Error correction codes; Field programmable gate arrays; Frequency; HDTV; Viterbi algorithm; DVB-T; FPGA; Puncturing; REA; Viterbi Decoder;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Information Technology, 2008. ISSPIT 2008. IEEE International Symposium on
Conference_Location :
Sarajevo
Print_ISBN :
978-1-4244-3554-8
Electronic_ISBN :
978-1-4244-3555-5
Type :
conf
DOI :
10.1109/ISSPIT.2008.4775681
Filename :
4775681
Link To Document :
بازگشت