ADC built-in-self-test based on a pseudorandom uniform noise generator

This paper describes a digital built-in-self-test (BIST) solution to ADC dynamic performance testing. The proposed ADC BIST system is based in a uniform histogram approach to test the linearity of ADCs. A pipeline ADC with a resolution of 10 bits, a DAC with the same resolution as the ADC under test and the proposed BIST scheme were modeled and simulated in MATLAB to prove its validity. Several 32 bits pseudorandom uniform noise generators were evaluated. When compared with the Gaussian histogram approach, the obtained results show that the error on the maximum INL is 0.13 LSB for the Mersenne twister pseudorandom uniform noise generator and an adequate statistical significance is obtained with a quarter of the samples. Additionally, the number and complexity of the circuits are reduced.