Sophisticated Computation of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems

An embedded multiprocessor FPGA system can provide powerful and more functionalities than single processor system. However, the hardware-software partitioning problem is more complex in system design because the system components become escalation. In this paper, we propose a sophisticated computation method (SCM) to solve hardware-software partitioning issues for embedded multiprocessor FPGA systems. The SCM consists of two levels partition which includes processors-fit level and multi-fit level constraints. In processors-fit level, the partitioning results of unsatisfying processor constraint can be rapidly eliminated. Next, multi-fit level constraints compute various system constraints that based on divide-and-conquer and exhaust methods. Experimental results show that our proposed method can rapidly obtain better partitioning results.