DocumentCode :
2633195
Title :
OPAL: A multi-layer hybrid photonic NoC for 3D ICs
Author :
Pasricha, Sudeep ; Bahirat, Shirish
Author_Institution :
Colorado State Univ., Fort Collins, CO, USA
fYear :
2011
fDate :
25-28 Jan. 2011
Firstpage :
345
Lastpage :
350
Abstract :
Three-dimensional integrated circuits (3D ICs) offer a significant opportunity to enhance the performance of emerging chip multiprocessors (CMPs) using high density stacked device integration and shorter through silicon via (TSV) interconnects that can alleviate some of the problems associated with interconnect scaling. In this paper we propose and explore a novel multi-layer hybrid photonic NoC fabric (OPAL) for 3D ICs. Our proposed hybrid photonic 3D NoC combines low cost photonic rings on multiple photonic layers with a 3D mesh NoC in active layers to significantly reduce on-chip communication power dissipation and packet latency. OPAL also supports dynamic reconfiguration to adapt to changing runtime traffic requirements, and uncover further opportunities for reduction in power dissipation. Our experimental results and comparisons with traditional 2D NoCs, 3D NoCs, and previously proposed hybrid photonic NoCs (photonic Torus, Corona, Firefly) indicate a strong motivation for considering OPAL for future 3D ICs as it can provide orders of magnitude reduction in power dissipation and packet latencies.
Keywords :
integrated circuit interconnections; integrated optics; microprocessor chips; network-on-chip; three-dimensional integrated circuits; 2D NoC; 3D IC; 3D mesh NoC; CMP; OPAL; TSV interconnects; chip multiprocessors; dynamic reconfiguration; high-density stacked device integration; magnitude reduction; multilayer hybrid photonic NoC fabric; on-chip communication power dissipation; packet latency; photonic rings; three-dimensional integrated circuits; through silicon via interconnects; Integrated circuit interconnections; Logic gates; Photonics; Power dissipation; Runtime; Three dimensional displays; Wavelength division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location :
Yokohama
ISSN :
2153-6961
Print_ISBN :
978-1-4244-7515-5
Type :
conf
DOI :
10.1109/ASPDAC.2011.5722211
Filename :
5722211
Link To Document :
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