DocumentCode :
2633627
Title :
An efficient hybrid engine to perform range analysis and allocate integer bit-widths for arithmetic circuits
Author :
Pang, Yu ; Radecka, Katarzyna ; Zilic, Zeljko
Author_Institution :
Coll. of Photo-Electron., Chongqing Univ. of Posts & Telecommun., Chongqing, China
fYear :
2011
fDate :
25-28 Jan. 2011
Firstpage :
455
Lastpage :
460
Abstract :
Range analysis is an important task in obtaining the correct, yet fast and inexpensive arithmetic circuits. The traditional methods, either simulation-based or static, have the disadvantage of low efficiency and coarse bounds, which may lead to unnecessary bits. In this paper, we propose a new method that combines several techniques to perform fixed-point range analysis in a datapath towards obtaining the much tighter ranges efficiently. We show that the range and the bit-width allocation can be obtained with better results relative to the past methods, and in significantly shorter time.
Keywords :
fixed point arithmetic; arithmetic circuits; bit-width allocation; datapath; efficient hybrid engine; fixed-point range analysis; integer bit-widths; Algorithm design and analysis; Approximation methods; Correlation; Engines; Polynomials; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location :
Yokohama
ISSN :
2153-6961
Print_ISBN :
978-1-4244-7515-5
Type :
conf
DOI :
10.1109/ASPDAC.2011.5722233
Filename :
5722233
Link To Document :
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