DocumentCode
2633840
Title
A moment-matching scheme for the passivity-preserving model order reduction of indefinite descriptor systems with possible polynomial parts
Author
Zhang, Zheng ; Wang, Qing ; Wong, Ngai ; Daniel, Luca
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
fYear
2011
fDate
25-28 Jan. 2011
Firstpage
49
Lastpage
54
Abstract
Passivity-preserving model order reduction (MOR) of descriptor systems (DSs) is highly desired in the simulation of VLSI interconnects and on-chip passives. One popular method is PRIMA, a Krylov-subspace projection approach which preserves the passivity of positive semidefinite (PSD) structured DSs. However, system passivity is not guaranteed by PRIMA when the system is indefinite. Furthermore, the possible polynomial parts of singular systems are normally not captured. For indefinite DSs, positive-real balanced truncation (PRBT) can generate passive reduced-order models (ROMs), whose main bottleneck lies in solving the dual expensive generalized algebraic Riccati equations (GAREs). This paper presents a novel moment-matching MOR for indefinite DSs, which preserves both the system passivity and, if present, also the improper polynomial part. This method only requires solving one GARE, therefore it is cheaper than existing PRBT schemes. On the other hand, the proposed algorithm is capable of preserving the passivity of indefinite DSs, which is not guaranteed by traditional moment-matching MORs. Examples are finally presented showing that our method is superior to PRIMA in terms of accuracy.
Keywords
Riccati equations; VLSI; electronic engineering computing; integrated circuit interconnections; integrated circuit modelling; polynomials; reduced order systems; DS; GARE; Krylov-subspace projection approach; MOR; PRBT; PRIMA; PSD; ROM; VLSI interconnects; algebraic Riccati equation; indefinite descriptor system; moment-matching MOR; moment-matching scheme; on-chip passive; passivity-preserving model order reduction; polynomial parts; positive semideflnite; positive-real balanced truncation; reduced-order model; Accuracy; Computational modeling; Decision support systems; Mathematical model; Numerical models; Polynomials; Read only memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location
Yokohama
ISSN
2153-6961
Print_ISBN
978-1-4244-7515-5
Type
conf
DOI
10.1109/ASPDAC.2011.5722240
Filename
5722240
Link To Document