• DocumentCode
    2634192
  • Title

    Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window

  • Author

    Ginez, O. ; Daga, J.-M. ; Girard, P. ; Landrault, C. ; Pravossoudovitch, S. ; Virazel, A.

  • Author_Institution
    de Robotique et de Micro electronique de Montpellier, Univ. de Montpellier
  • fYear
    2007
  • fDate
    6-10 May 2007
  • Firstpage
    47
  • Lastpage
    52
  • Abstract
    The evolution of system-on-chip (SoC) designs involves the development of non-volatile memory technologies like flash. Embedded flash (eFlash) memories are based on the floating-gate transistor concept and can be subject to complex hard defects creating functional faults. In this paper, the authors analyze the impact of a defective tunnel window oxide thickness. The authors show that this defective oxide thickness impacts erase or/and write operations as well as the retention and reliability of the eFlash. The proposed solution to detect such a defective oxide consists in using the voltage disturbance due to the coupling phenomenon existing between bit lines. This particular defective mechanism can be modeled as a coupling fault, especially a state coupling fault. Based on this analysis, the authors propose a test solution that uses two checkerboard patterns; checkerboard pattern (CKB) and its complement (CKBI). The authors show that these two patterns have to be applied by using a parallel programming approach, which allows to increase the coupling phenomenon and thus the voltage disturbance
  • Keywords
    embedded systems; flash memories; parallel programming; reliability; system-on-chip; checkerboard pattern; data retention; embedded flash memories; floating-gate transistor; functional faults; nonvolatile memory; parallel programming; state coupling fault; system-on-chip; tunnel window oxide thickness; voltage disturbance; Flash memory; Libraries; Logic testing; Nonvolatile memory; Parallel programming; Random access memory; Robots; Tunneling; Uniform resource locators; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 2007. 25th IEEE
  • Conference_Location
    Berkeley, CA
  • ISSN
    1093-0167
  • Print_ISBN
    0-7695-2812-0
  • Type

    conf

  • DOI
    10.1109/VTS.2007.52
  • Filename
    4209890