A consistent physical framework for N and P BTI in HKMG MOSFETs

Author

Joshi, Kaustubh ; Mukhopadhyay, Subhadeep ; Goel, Nilesh ; Mahapatra, Souvik

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol. Bombay, Mumbai, India

fYear

2012

fDate

15-19 April 2012

Abstract

A common framework of trap generation and trapping is used to explain Negative Bias Temperature Instability (NBTI) and Positive Bias Temperature Instability (PBTI) DC and AC stress/recovery data. NBTI is explained using trap generation in Si/SiON (IL) interface and SiON (IL) bulk, together with hole trapping in pre-existing bulk SiON (IL) traps. Interface trap generation and recovery can be fully explained using Reaction-Diffusion (RD) model. PBTI is explained using trap generation in SiON (IL)/HK interface and HK bulk, together with electron trapping in pre-existing bulk HK traps. Important similarities as well as differences between N and P BTI are highlighted.

Keywords

MOSFET; elemental semiconductors; high-k dielectric thin films; hole traps; reaction-diffusion systems; semiconductor device models; silicon; silicon compounds; AC stress; DC stress; HKMG MOSFET; NBTI; PBTI; RD model; Si-SiON; hole trapping; interface trap generation; negative bias temperature instability; positive bias temperature instability; reaction-diffusion model; Degradation; Electron traps; Predictive models; Stress; Stress measurement; Time measurement; AC stress; DC stress; NBTI; NBTI Modeling; PBTI; PBTI Modeling; RD Model; Trap Generation; Trapping;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2012 IEEE International

Conference_Location

Anaheim, CA

ISSN

1541-7026

Print_ISBN

978-1-4577-1678-2

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2012.6241840

Filename

6241840