• DocumentCode
    2634474
  • Title

    Impact of VLSI technology scaling on HTOL

  • Author

    Kwasnick, Robert ; Reilly, Matthew ; Hatfield, Jonathan ; Johnson, Scott C. ; Rahman, Anisur

  • Author_Institution
    Intel Corp., Santa Clara, CA, USA
  • fYear
    2012
  • fDate
    15-19 April 2012
  • Abstract
    High Temperature Operating Life (HTOL) is a standard stress used in IC product qualification. With VLSI technology scaling, gate dielectric TDDB models have higher acceleration factors leading to an increase in predicted HTOL failure, particularly with the transition to high-k gate dielectrics. However, cumulative end-of-life field failures remain substantially unchanged from previous technologies. A calculator tool which comprehends both field and HTOL failure modeling illustrates the trend and guides product qualification expectations.
  • Keywords
    VLSI; failure analysis; high-k dielectric thin films; integrated circuit modelling; HTOL failure modeling; IC product qualification; VLSI technology scaling; acceleration factors; cumulative end-of-life field failures; gate dielectric TDDB models; high temperature operating life; high-k gate dielectrics; product qualification expectations; Acceleration; Dielectrics; High K dielectric materials; Logic gates; MOS devices; Reliability; Stress; HTOL; High Temperature Operating Life; TDDB; Time-dependent dielectric breakdown; VLSI scaling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium (IRPS), 2012 IEEE International
  • Conference_Location
    Anaheim, CA
  • ISSN
    1541-7026
  • Print_ISBN
    978-1-4577-1678-2
  • Electronic_ISBN
    1541-7026
  • Type

    conf

  • DOI
    10.1109/IRPS.2012.6241850
  • Filename
    6241850