Challenges for introducing Ge and III/V devices into CMOS technologies

Author

Heyns, M. ; Alian, A. ; Brammertz, G. ; Caymax, M. ; Eneman, G. ; Franco, J. ; Gencarelli, F. ; Groeseneken, G. ; Hellings, G. ; Hikavyy, A. ; Houssa, M. ; Kaczer, B. ; Lin, D. ; Loo, R. ; Merckling, C. ; Meuris, M. ; Mitard, J. ; Nyns, L. ; Sioncke, S. ;

Author_Institution

MTM, K.U. Leuven, Leuven, Belgium

fYear

2012

fDate

15-19 April 2012

Abstract

High mobility channel materials and new device structures will be needed to meet the power and performance specifications in future technology nodes. In these new material systems and devices various electrically active defects are present at or close to the interface between the high-k dielectric and the alternative channel material which are a major concern for both the performance and the reliability of these new devices.

Keywords

CMOS integrated circuits; III-V semiconductors; carrier mobility; elemental semiconductors; germanium; quantum well devices; CMOS technologies; alternative channel material; device performance; device reliability; device structures; electrically active defects; high mobility channel materials; high-k dielectric material; new material systems; technology nodes; Aluminum oxide; Logic gates; Passivation; Silicon; Substrates; CMOS; Germanium; III/V; defects;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2012 IEEE International

Conference_Location

Anaheim, CA

ISSN

1541-7026

Print_ISBN

978-1-4577-1678-2

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2012.6241852

Filename

6241852