Abstract :
As embedded memories continue to occupy a large percentage of the real estate in today¿s SoCs, understanding the memory failure modes and dealing with them has a major impact on the quality of the SoC. While the failure modes in past technologies were adequately analyzed and dealt with, understanding the failure modes in today¿s cases, such as embedded DRAMs on CMOS technology, embedded memories in SOI technology, as well as process variation and other new failure types in nanometer technologies. This session will allow us to understand the new failure modes and analyze the ways to deal with them in terms of test and repair.
