Automated Design and Insertion of Optimal One-Hot Bus Encoders

Tristate buses, commonly used in high-performance designs, raise testability problems because one-hot conditions, required for functional operation, may not be maintained during scan testing. We present a novel method to automatically generate and insert a bus encoder that ensures one-hot bus operation. Each bus is analyzed individually; a customized encoder is then generated and optimized for best testability and minimal area and delay. We introduce two new bus encoder designs which form the basis of a hierarchically algorithm that scales up to any number of bus inputs.