Session Abstract

Design complexity has grown as technology scaling has continued to make inroads, and it is common to see designs with multiple cores, multiple clock domains, multi-million gates, and tens of thousands of flip-flops. Design cycle time and cost always take precedence over other considerations, making test often a challenge. With design and test teams working on "pushing the envelope" designs, we believe that collaborative innovation between front-end, back-end, DFT, EDA, and tester teams is a key to first-pass success in meeting test cost and time-to-market constraints. The presentations in this session highlight this theme, and showcase another growing trend -- the bourgeoning semiconductor industry in India, which is beginning to develop several innovative and cost effective VLSI test solutions.