Title :
Reliability evaluations of ECP tools and chemistries
Author :
Hall, Gavin D. R. ; Allman, Derryl D. J. ; Piatt, G. ; Hulse, P.T.
Author_Institution :
Process Integration & Process Eng., ON Semicond., Gresham, OR, USA
Abstract :
Microstructural considerations were studied in a tool qualification for ECP in a dual-damascene 110nm Cu/low-k BEOL process. Wafer Level tests (HTS, Isothermal EM) using standard SM/SIV and EM test structures were used to compare two ECP tools and chemistries, and sensitivities were further investigated with materials analysis consisting of Elemental (TOF-SIMS), EBSD (texture analysis) and grain-size analysis. It is found that the differences in the relative grain-size, and impurity content both contributed to the improvement of the TTF for EM and SM/SIV. Interpretation of the SIV data used a proportional hazards model, incorporating basic elements of stochastic geometry to find a scaling form which can be used to extract the relative change in Cu mobility.
Keywords :
copper; electroplating; grain size; impurities; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; secondary ion mass spectroscopy; stochastic processes; time of flight mass spectra; BEOL process; EBSD; ECP tools; EM test structures; HTS; SIV data; TTF; chemistry; copper mobility; dual-damascene; elemental TOF-SIMS; grain-size analysis; impurity content; isothermal EM; materials analysis; microstructural considerations; proportional hazards model; relative grain-size; reliability evaluations; scaling form; standard SIV; standard SM; stochastic geometry; texture analysis; tool qualification; wafer level tests; Chemistry; High temperature superconductors; Impurities; Reliability; Resistance; Stress;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2012 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4577-1678-2
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2012.6241897
