Session Abstract

The drive toward pervasive RF is pushing the many consumer chips to have RF blocks embedded in them. While a lot of attention has been paid to the yield of the digital block, the yield for RF deices is relatively unexplored and yet is critical in the overall yield of a chip or a package. Today, with deep-submicron technology, yield learning becomes the most critical element for ramping to high volume production and achieving an acceptable profit margin. Collecting early production data and getting more out of test is a very important task to quickly improve yield. RF devices are known to be sensitive to local and global process variation therefore optimization for performance and yield early in the design flow is the only way to avoid design re-spins and to reduce the cost. Design for manufacturing has to be seriously considered especially for highly integrated devices.