DocumentCode
2635598
Title
Binding and scheduling algorithms for highly retargetable compilation
Author
Yamaguchi, Masayuki ; Ishiura, Nagisa ; Kambe, Takashi
Author_Institution
Precision Technol. Center, Sharp Corp., Nara, Japan
fYear
1998
fDate
10-13 Feb 1998
Firstpage
93
Lastpage
98
Abstract
This paper presents new binding and scheduling algorithms for a retargetable compiler which can deal with diverse architectures. Application specific embedded processors often includes a “nonorthogonal” datapath where all the registers are not equally accessible from all the functional units. Nonorthogonal datapath makes a binding task very hard because inadvertent assignment of an operation to a functional unit may rule out all the possible assignments to other operations due to reachability constraints among datapath resources. Scheduling must take register capacity constraints into account in addition to resource constraints. We discuss these problems and propose algorithms to solve them
Keywords
data flow computing; logic CAD; parallel architectures; program compilers; scheduling; binding; datapath; nonorthogonal datapath; register capacity; resource constraints; retargetable compiler; scheduling; Application software; Computer architecture; Computer languages; Hardware; Programming; Random access memory; Registers; Scheduling algorithm; Transportation; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
0-7803-4425-1
Type
conf
DOI
10.1109/ASPDAC.1998.669414
Filename
669414
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