DocumentCode
2635623
Title
Singleport/multiport memory synthesis in data path design
Author
Chen, Chien-In Henry ; Sobelman, Gerald E.
Author_Institution
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
1110
Abstract
A simple yet efficient method is presented to explore the design space for memory synthesis which deals not only with single-port memory synthesis but also multiport memory synthesis according to the design constraints. The application of this method to different synthesis examples is illustrated, and improvements over previous techniques are demonstrated. The technique avoids certain locally optimal solutions to achieve more globally optimal solutions than were obtained in the previously proposed 0-1 integer programming technique. With suitable modifications, the technique could be applied to multiport memory synthesis in which the maximum number of read ports is different from the maximum number of write ports
Keywords
circuit layout CAD; integrated memory circuits; memory architecture; CAD; data path design; dependence matrix; globally optimal solutions; multiport memory synthesis; single-port memory synthesis; Linear programming; Merging; Multiplexing; Read-write memory; Registers; Space exploration; Storage automation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112310
Filename
112310
Link To Document