DocumentCode
2635666
Title
A high-linearity up-conversion mixer utilizing negative resistor
Author
Wu, Chang-Hsi ; Huang, Wen-Hui
Author_Institution
Dept. of Electron. Eng., Lunghwa Univ. of Sci. & Technol., Taoyuan, Taiwan
Volume
2
fYear
2010
fDate
17-20 Sept. 2010
Firstpage
1
Lastpage
4
Abstract
A 5.2GHz double-balanced up-conversion mixer using 0.18μm CMOS technology is proposed in this paper. The current-enhanced and negative-resistance compensation techniques are employed to the transconductance stage to increase the conversion gain without sacrificing the linearity. Beside, current-enhanced topology also has the advantage of the current bleeding. Measured results of the proposed up-conversion mixer exhibit the conversion gain of 10dB and IIP3 of -3dBm, while only consuming 5.2mW from a 1.3-V supply voltage. The chip size is 0.98mm × 1.045mm.
Keywords
CMOS integrated circuits; mixers (circuits); negative resistance circuits; CMOS technology; current-enhanced compensation; frequency 5.2 GHz; gain 10 dB; high-linearity up-conversion mixer; negative resistor; negative-resistance compensation; power 5.2 mW; size 0.18 mum; voltage 1.3 V;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals Systems and Electronics (ISSSE), 2010 International Symposium on
Conference_Location
Nanjing
Print_ISBN
978-1-4244-6352-7
Type
conf
DOI
10.1109/ISSSE.2010.5607021
Filename
5607021
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