Calibration Method for a CMOS 0.06mm^2 150MS/s 8-bit ADC

Author

Petrellis, Nikos ; Birbas, Michael ; Kikidis, John ; Birbas, Alexios

Author_Institution

Analogies S.A., Patras, Greece

fYear

2009

fDate

27-29 Aug. 2009

Firstpage

191

Lastpage

195

Abstract

An ultra low area 8-bit Analog-to-Digital Converter (ADC) has been designed achieving a 150 MS/S sampling rate and dissipating 34 mW power. It is based on integer division circuits that are arranged in a binary tree structure. We emphasize on the digital calibration method of such an ADC in order to extend its operational temperature range and correct the effect of mismatch and process variations. The calibration is achieved by controlling the voltage supply of the root divider and the amplification and offset correction of the residue that is produced by this divider.

Keywords

CMOS digital integrated circuits; analogue-digital conversion; calibration; dividing circuits; trees (mathematics); CMOS technology; amplification; analog-to-digital converter; asynchronous 8-bit ADC; binary tree structure; current mode 8-bit ADC; digital calibration method; integer division circuits; offset correction; power 34 mW; root divider; voltage supply; Analog-digital conversion; Binary trees; CMOS technology; Calibration; Capacitors; Mirrors; Power supplies; Sampling methods; Temperature distribution; Temperature sensors; Analog Digital Conversion; Calibration; Integer Division;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on

Conference_Location

Patras

Print_ISBN

978-0-7695-3782-5

Type

conf

DOI

10.1109/DSD.2009.182

Filename

5350102