• DocumentCode
    2636265
  • Title

    Combined SD-RNS Constant Multiplication

  • Author

    Vassalos, E. ; Bakalis, D.

  • Author_Institution
    Phys. Dept., Univ. of Patras, Patras, Greece
  • fYear
    2009
  • fDate
    27-29 Aug. 2009
  • Firstpage
    172
  • Lastpage
    179
  • Abstract
    In this paper we present constant multiplication architectures for the residue number system (RNS) moduli set {2n-1, 2n, 2n+1} using the signed-digit (SD) representation for recoding the constant operand. The resulting circuits require a small number of partial products, hence, their area and delay is also small.
  • Keywords
    multiplying circuits; residue number systems; combined SD-RNS constant multiplication; constant operand recoding; residue number system; signed-digit representation; Arithmetic; Circuits; Delay; Design methodology; Digital signal processing; Digital systems; Discrete cosine transforms; Finite impulse response filter; Laboratories; Physics; 2^n; 2^n+1} arithmetic; CSD representation; Residue number system; constant multiplication; modulo {2^n-1; signed-digit number system;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on
  • Conference_Location
    Patras
  • Print_ISBN
    978-0-7695-3782-5
  • Type

    conf

  • DOI
    10.1109/DSD.2009.175
  • Filename
    5350118
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2636265