• DocumentCode
    2636689
  • Title

    Synthesis of delay-insensitive circuits by refinement into atomic threads

  • Author

    Li, H.F. ; Leung, S.C. ; Lam, P.N.

  • Author_Institution
    Dept. of Comput. Sci., Concordia Univ., Montreal, Que., Canada
  • fYear
    1991
  • fDate
    14-16 Oct 1991
  • Firstpage
    180
  • Lastpage
    186
  • Abstract
    An optimization strategy based on time-sharing was previously proposed by the authors (1991). A process is decomposed into threads and the technique of time-sharing is applied in the synthesis of each thread and the synchronization requirements among threads. This study presents an extension of the methodology to nondeterminate processes. The synchronization requirements among threads include the passing of choice information as well as the causal relations between events from different threads. Substantial reduction in circuitry for realizing the synchronization requirements is observed if the choice states of threads are atomic (necessarily reached) and all the occurrences of an action belong to a thread. A theory on extracting threads that have the above properties and on synthesizing the synchronization requirements among threads is outlined
  • Keywords
    asynchronous sequential logic; logic circuits; logic design; sequential circuits; atomic threads; causal relations; choice information; circuit synthesis; delay-insensitive circuits; nondeterminate processes; synchronization requirements; thread extraction; time sharing optimisation; Circuit synthesis; Clocks; Computer science; Delay; Hardware; Joining processes; Sequential circuits; Synchronization; Time sharing computer systems; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-2270-9
  • Type

    conf

  • DOI
    10.1109/ICCD.1991.139877
  • Filename
    139877