PDL++: an optimizing generator language for register transfer design

PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the generating process more natural: the generator program is often nearly identical to the program which computes the function itself