DocumentCode :
2637202
Title :
Low voltage comparator for high speed ADC
Author :
Gao, Hao ; Baltus, Peter ; Meng, Qiao
Author_Institution :
Mixed-Signal Microelectron., Eindhoven Univ. of Technol., Eindhoven, Netherlands
Volume :
1
fYear :
2010
fDate :
17-20 Sept. 2010
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a design of a high-speed, low-voltage, low power consumption comparator with S-R latch for High speed ADC. The comparator is the most important part in the Flash ADC, since the speed and the resolution is determined by the comparator. In this paper, we do the analysis of the traditional comparator and propose a better structure combing sense amplifier and symmetric S-R latch, which can run faster and provide more stable output signal than the traditional structure. The comparator is composed of a latch based amplifier and a S-R latch which provides stable output. There are many issues in the design of the comparator, we will discuss those design issues in this paper.
Keywords :
analogue-digital conversion; comparators (circuits); high-speed integrated circuits; low-power electronics; ultra wideband communication; combing sense amplifier; flash ADC; high speed ADC; high-speed comparator; latch based amplifier; low voltage comparator; low-power consumption comparator; symmetric S-R latch; Clocks; Delay; Inverters; Latches; Strontium; Topology; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals Systems and Electronics (ISSSE), 2010 International Symposium on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-6352-7
Type :
conf
DOI :
10.1109/ISSSE.2010.5607121
Filename :
5607121
Link To Document :
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