DocumentCode
2637868
Title
Study of regression methodologies on analog circuit design
Author
Guerra-Gomez, Ivick ; McConaghy, Trent ; Tlelo-Cuautle, E.
Author_Institution
SEMTECH, Aguascalientes, Mexico
fYear
2015
fDate
25-27 March 2015
Firstpage
1
Lastpage
6
Abstract
This paper benchmarks accuracy and speed of many regression techniques on medium and large-scale circuit modelling problems, with particular emphasis on Gaussian Process Models. Regression models are widely used in electronics on parasitic modelling, verification, reliability analysis, optimization and layout generators. The main goal of using a regression model is to save simulation time with minimum accuracy loss. However, regression models exhibit different features and their performances can vary depending on the number of variables and training/test data. This paper tests different regression models for different setups and circuits. The test problems were grouped in medium and high dimension problems according with the number of variables. The model building time, model predicting time and model predicting error were compared with the actual data. Some constraints can be found for some regression techniques when are used on different problems and some of them change their performances in terms of time and/or error. The results summary and the performance comparatives can be a decision tool when it is planning to be used one of these techniques.
Keywords
Gaussian processes; analogue integrated circuits; integrated circuit modelling; regression analysis; Gaussian process models; analog circuit design; large-scale circuit modelling problem; medium-scale circuit modelling problem; minimum accuracy loss; model building time; model predicting error; model predicting time; regression technique; Gaussian processes; Integrated circuit modeling; Mathematical model; Predictive models; Testing; Training; Training data;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (LATS), 2015 16th Latin-American
Conference_Location
Puerto Vallarta
Type
conf
DOI
10.1109/LATW.2015.7102504
Filename
7102504
Link To Document