Title :
A 625 MHz CMOS Phase-locked Loop Used In Lock Detector Application
Author :
Alavi, S.M. ; Shoaei, O.
Author_Institution :
Tehran Univ.
Abstract :
The design of a 625 MHz fully differential phase-locked loop (PLL) is described. The circuit incorporates a phase-frequency detector, a charge pump, a novel quadrature ring oscillator with a new active load and frequency dividers. This PLL CMOS circuit is used in the lock detector for aiding frequency acquisition for the clock and data recovery circuit. This circuit is supported by system and circuit (CMOS 0.35mum) level simulation by CPP simulator and HSPICE
Keywords :
CMOS integrated circuits; frequency dividers; oscillators; phase detectors; phase locked loops; 0.35 micron; 625 MHz; CMOS phase-locked loop; CPP simulator; HSPICE simulator; PLL CMOS circuit; charge pump; circuit level simulation; clock and data recovery circuit; frequency acquisition; frequency dividers; fully differential phase-locked loop; lock detector; phase-frequency detector; quadrature ring oscillator; Charge pumps; Circuit simulation; Clocks; Control system synthesis; Frequency conversion; Phase detection; Phase frequency detector; Phase locked loops; Ring oscillators; Voltage-controlled oscillators;
Conference_Titel :
Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
Conference_Location :
Gdynia
Print_ISBN :
83-922632-2-7
DOI :
10.1109/MIXDES.2006.1706564
