DocumentCode
2637927
Title
Soft Error Tolerant Asynchronous Circuits Based on Dual Redundant Four State Logic
Author
Friesenbichler, Werner ; Steininger, Andreas
Author_Institution
Embedded Comput. Syst. Group, Vienna Univ. of Technol., Vienna, Austria
fYear
2009
fDate
27-29 Aug. 2009
Firstpage
100
Lastpage
107
Abstract
The continuing downscaling of integrated circuits makes modern devices more susceptible to soft errors. This paper investigates the possibility of using Four-State Logic (FSL) to improve the fault tolerance of digital circuits. FSL is a possible implementation of asynchronous Quasi Delay Insensitive (QDI) logic using a more efficient encoding and handshake protocol. The behavior of asynchronous circuits designed with FSL when subjected to transient faults is analyzed. We present methods based on dual redundancy that allow to detect as well as correct soft errors autonomously. The concept is demonstrated by fault injection experiments.
Keywords
asynchronous circuits; fault tolerance; integrated circuit reliability; asynchronous quasidelay insensitive logic; digital circuits; dual redundancy; dual redundant four state logic; encoding; fault injection experiments; handshake protocol; integrated circuit continuing downscaling; soft error tolerant asynchronous circuits; transient faults; Asynchronous circuits; Circuit faults; Delay; Digital circuits; Encoding; Fault tolerance; Logic circuits; Logic devices; Protocols; Transient analysis; Asynchronous Logic; Dual-Redundancy; Fault Tolerance; Four-State Logic; Soft Error;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, Architectures, Methods and Tools, 2009. DSD '09. 12th Euromicro Conference on
Conference_Location
Patras
Print_ISBN
978-0-7695-3782-5
Type
conf
DOI
10.1109/DSD.2009.142
Filename
5350227
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