DocumentCode :
263846
Title :
Analysis and implementation of parallel causal bit plane coding in JPEG2000 standard
Author :
Ghodhbani, Refka ; Saidani, Taoufik ; Horrigue, Layla ; Atri, Mohamed
Author_Institution :
Electron. & Micro-Electron. Lab., Univ. of Monastir, Monastir, Tunisia
fYear :
2014
fDate :
17-19 Jan. 2014
Firstpage :
1
Lastpage :
6
Abstract :
With the augmentation in multimedia technology, demand for high speed real time image compression system has also increased. JPEG2000 is a relatively new image compression standard which builds and improves on its predecessor JPEG.In Jpeg 2000 the embedded Block Coding with Optimal Truncation (EBCOT) is the most important element to calculate the very hard portion in the compressing process of JPEG 2000 image compression standard. This paper proposes a Parallel Bit Plane Coding (BPC) architecture in which three coding passes operate in parallel and are allowed to progress independently. The proposed architecture with causal mode is able to benefit ¾ of clock cycles than a parallel coder with normal mode.
Keywords :
data compression; image coding; BPC architecture; EBCOT; JPEG2000 standard; embedded block coding with optimal truncation; image compression standard; multimedia technology; parallel causal bit plane coding; Clocks; Context; Discrete wavelet transforms; Encoding; Image coding; Standards; Transform coding; EBCOT; FPGA; JPEG2000; VHDL; VLSI;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Applications and Information Systems (WCCAIS), 2014 World Congress on
Conference_Location :
Hammamet
Print_ISBN :
978-1-4799-3350-1
Type :
conf
DOI :
10.1109/WCCAIS.2014.6916602
Filename :
6916602
Link To Document :
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