DocumentCode
2638747
Title
DFT for improving the testability of parametric resistor faults in a strain gauge measurement circuit
Author
Wong, Mike W T
Author_Institution
Dept. of Electron. & Inf. Eng., Hong Kong Polytech. Univ., Kowloon, China
Volume
1
fYear
2003
fDate
15-17 Oct. 2003
Firstpage
488
Abstract
This paper describes how equivalent fault analysis is used to formulate a DFT scheme for a strain gauge measurement circuit, consisting of a Wheatstone bridge and amplifier. The derivation of fault equivalence relationships benefit from the simplification of analyzing each subcircuit in isolation from the system. The error introduced by ignoring loading and coupling effects is shown to be small for the fault ranges considered. The DFT solution developed combined individual solutions to subcircuit fault equivalence. Experimental results obtained demonstrate the effectiveness and validity of the approach.
Keywords
bridge circuits; circuit testing; design for testability; fault diagnosis; instrumentation amplifiers; strain gauges; strain measurement; DFT; Wheatstone bridge; amplifier; equivalent fault analysis; fault diagnosis; fault equivalence relationships; parametric resistor faults; strain gauge measurement circuit testability; Capacitive sensors; Circuit faults; Circuit testing; Electrical resistance measurement; Hardware; Information analysis; Operational amplifiers; Piezoresistance; Resistors; Strain measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2003. Conference on Convergent Technologies for the Asia-Pacific Region
Print_ISBN
0-7803-8162-9
Type
conf
DOI
10.1109/TENCON.2003.1273370
Filename
1273370
Link To Document