A low-power IF circuit with 5-dB minimum input SNR for GFSK low-IF receivers

For WPAN (Wireless Personal Area Network) applications, a low-power low-noise IF (Intermediate-Frequency) circuit is proposed for GFSK (Gauss Frequency Shift Keying) low-IF receivers. The proposed IF system is realized by an all-analog architecture, which is composed of a couple of LAs (Limiting Amplifiers) and RSSIs (Received Signal Strength Indicators), a couple of BPFs (Band-Pass Filters), a FD (Frequency Detector), a LPF (Low-Pass Filter) and a slicer. The chip is implemented with HJTC 0.18-μm CMOS technology and measured under a data rate of 100 kb/s, a carrier frequency of 200 kHz and a modulation index of 1.0. The RSSI has a dynamic range of 51 dB with a logarithmic linearity error of less than ±1 dB. For 0.1% BER (Bit Error Ratio), the minimum input SNR (Signal-to-Noise Ratio) of the proposed IF circuit is 5 dB, and the input dynamic range of the whole IF circuit is 55.4 dB. When the input SNR is set at 6 dB, the proposed circuit can tolerate a frequency offset from -3% to +9.5%. The total power consumption of the proposed IF circuit is 5.65 mW ~5.89 mW.