DocumentCode
2639396
Title
A neural network approach to hierarchical analog fault diagnosis
Author
Somayajula, Shyam S.
Author_Institution
Dept. of Electr. Eng. Texas A&M Univ., College Station, TX, USA
fYear
1993
fDate
20-23 Sep 1993
Firstpage
699
Lastpage
706
Abstract
A novel technique involving a neural network for efficient hierarchical fault diagnosis of analog circuits and systems is presented. The fault clustering property of the neural network is utilized to conceptualized the fault equivalence and BC (behavioral condition) reduction at higher levels. It is also shown that fault diagnosis can be done at any desired level and the precision of the diagnosis can be controlled during the fault dictionary generation stage. This technique can be applied to diagnose systems irrespective of their domain of operation as long as they can simulated. The proposed methodology was verified using an OTA-C low pass filter
Keywords
automatic test equipment; fault diagnosis; hierarchical systems; low-pass filters; pattern recognition; self-organising feature maps; OTA-C low pass filter; fault clustering; hierarchical analog fault diagnosis; neural network; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Electronic circuits; Electronic equipment testing; Fault diagnosis; Filters; Neural networks; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
AUTOTESTCON '93. IEEE Systems Readiness Technology Conference. Proceedings
Conference_Location
San Antonio, TX
Print_ISBN
0-7803-0646-5
Type
conf
DOI
10.1109/AUTEST.1993.396286
Filename
396286
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