Partial Analysis For Functional Testing Of Digital IP-cores

With the improvement of VLSI technologies, many components of highly complex functions can be fabricated into a single chip. However, the high density and complexity of integrated circuits brought with it challenges to traditional test techniques. According to the silicon industry, the cost of fabricating a chip will drop below that of test. Hence, it is imperative that test techniques lower testing costs. The work presented in this paper is an attempt to reduce the cost of testing by the modelling the circuit under test in a manner suitable for hierarchical implementation and the introduction of partial analysis. A limited analysis requires less time and effort compared to a complete analysis