Title :
Probabilistic Testability Measure Before Pseudorandom Test Generation
Author :
Kaminska, Maryna ; Kulak, Elvira ; Guz, Olesya ; Yeliseev, V.V.
Author_Institution :
Kharkov Nat. Univ. of Radio Electron.
Abstract :
It is proposed more suitable method of the testability analysis of the digital systems in comparison with known classical algorithmic and probabilistic methods. It is oriented on the complex combinational and sequential asynchronous logic circuits. Estimation of the testability is based on the topological analysis of the circuit. The new method and above mentioned methods were approved on the circuits of different complexity, including circuits from ISCAS´85, ´89 Libraries. Proposed method can be used on gate-level and RT-level circuit description
Keywords :
circuit testing; network analysis; network topology; probability; random sequences; digital systems; probabilistic testability measure; pseudorandom test generation; testability analysis; topological analysis; Automatic test pattern generation; Circuit faults; Circuit simulation; Circuit testing; Controllability; Costs; Electronic equipment testing; Logic testing; Observability; System testing;
Conference_Titel :
Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
Conference_Location :
Gdynia
Print_ISBN :
83-922632-2-7
DOI :
10.1109/MIXDES.2006.1706649
