Title :
Hardware Realization Of The MPEG-7 Edge Histogram Descriptor
Author :
Kapela, R. ; Rybarczyk, A. ; Sniatala, Pawel ; Rudnicki, R.
Author_Institution :
Poznan Univ. of Technol.
Abstract :
The paper presents hardware implementation of the MPEG-7 edge histogram descriptor. The testing circuit was described using VHDL language and synthesized into FPGA. The RC1000 board with a Xilinx Virtex V1000 FPGA was chosen as the target platform. Experimental results of the descriptor efficiency are presented too
Keywords :
field programmable gate arrays; hardware description languages; logic design; video coding; FPGA; MPEG-7; RC1000; VHDL language; Xilinx Virtex V1000; edge histogram descriptor; hardware realization; testing circuit; Application specific integrated circuits; Cameras; Circuit testing; Field programmable gate arrays; Hardware; Histograms; Image edge detection; MPEG 7 Standard; Multimedia systems; Paper technology;
Conference_Titel :
Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
Conference_Location :
Gdynia
Print_ISBN :
83-922632-2-7
DOI :
10.1109/MIXDES.2006.1706669
