Practical Aspects Of Development Of Embedded Systems With RTCP-nets And Adder Tools

Using of formal methods at different stages in the embedded system development process may both increase the quality of developed software and reduce the cost of its testing and the debugging. However, formal methods are not widely used in industrial software development. Such a situation could be treated as a result of a lack of suitable tools for fast designing of models and its automatic verification. The presented approach is based on a class of Petri nets called RTCP-nets. The paper focuses on computer tools, that are being developed at AGH University of Science and Technology in Krakow, that support the design and verification of hierarchical RTCP-nets models. A short description of hierarchical RTCP-nets and a survey of main software features are presented in the paper