• DocumentCode
    2640136
  • Title

    Design Closure Driven Delay Relaxation Based on Convex Cost Network Flow

  • Author

    Lin, Chuan ; Xie, Aiguo ; Zhou, Hai

  • Author_Institution
    Magma Design Autom., Santa Clara, CA
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Design closure becomes hard to achieve at physical layout stage due to the emergence of long global interconnects. Consequently, interconnect planning needs to be integrated in high level synthesis. Delay relaxation that assigns extra clock latencies to functional resources at RTL (register transfer level) can be leveraged. This paper proposed a general formulation for design closure driven delay relaxation problem. The authors show that the general formulation can be transformed into a convex cost integer dual network flow problem and solved in polynomial time using the convex cost-scaling algorithm in (Ahuja et al., 2003). Experimental results validate the efficiency of the approach
  • Keywords
    high level synthesis; integrated circuit interconnections; relaxation; convex cost network flow; design closure; driven delay relaxation; global interconnects; high level synthesis; interconnect planning; polynomial time; register transfer level; Clocks; Costs; Delay; Design automation; High level synthesis; Integrated circuit interconnections; Pipeline processing; Polynomials; Registers; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364568
  • Filename
    4211773