DocumentCode
2640428
Title
Efficient High-Performance ASIC Implementation of JPEG-LS Encoder
Author
Papadonikolakis, Markos ; Pantazis, Vasilleios ; Kakarountas, Athanasios P.
Author_Institution
Alma Technol.
fYear
2007
fDate
16-20 April 2007
Firstpage
1
Lastpage
6
Abstract
This paper introduces an innovative design which implements a high-performance JPEG-LS encoder. The encoding process follows the principles of the JPEG-LS lossless mode. The proposed implementation consists of an efficient pipelined JPEG-LS encoder, which operates at a significantly higher encoding rate than any other JPEG-LS hardware or software implementation while keeping area small
Keywords
application specific integrated circuits; image coding; ASIC implementation; JPEG-LS encoder; JPEG-LS hardware implementation; JPEG-LS lossless mode; JPEG-LS software implementation; encoding process; Algorithm design and analysis; Application specific integrated circuits; Compression algorithms; Context modeling; Hardware; Image coding; Image reconstruction; Satellites; Transform coding; Very large scale integration; Image processing; JPEG-LS; LOCO-I; VLSI implementation; lossless compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location
Nice
Print_ISBN
978-3-9810801-2-4
Type
conf
DOI
10.1109/DATE.2007.364584
Filename
4211789
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