DocumentCode :
264071
Title :
Design of folded CCDs for ultra high speed imaging
Author :
Nguyen, Hieu D. ; Dao, V.T.S. ; Etoh, Takeharu G.
Author_Institution :
Sch. of Electron. & Telecommun., Ha Noi Univ. of Sci. & Technol., Hanoi, Vietnam
fYear :
2014
fDate :
July 30 2014-Aug. 1 2014
Firstpage :
327
Lastpage :
330
Abstract :
The simplest idea to design an in-situ memory CCD is to fold it and install in each pixel. The conventional CCD process technology with double or triple poly-silicon electrodes makes it very difficult to achieve folded CCDs. By utilizing a conventional CMOS process technology with only a single poly-silicon layer consisting of plurality of electrodes with a spacing of 150nm, we can design folded CCDs installed in each pixel. However, it is challenging to realize a practical folded CCD that has sufficient transfer efficiency and reasonable amount of full well capacity. This paper reports a design of folded CCDs for ultra high speed imaging with example simulation results.
Keywords :
CCD image sensors; CMOS image sensors; electrochemical electrodes; elemental semiconductors; silicon; CCD process technology; CMOS process technology; Si; distance 150 nm; double polysilicon electrode layer; triple polysilicon electrode layer; ultrahigh speed CCD imaging; Charge coupled devices; BSI; CCD; ISAS; ISIS; high-speed; image sensor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Electronics (ICCE), 2014 IEEE Fifth International Conference on
Conference_Location :
Danang
Print_ISBN :
978-1-4799-5049-2
Type :
conf
DOI :
10.1109/CCE.2014.6916724
Filename :
6916724
Link To Document :
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