Mapping Multi-Dimensional Signals into Hierarchical Memory Organizations

The storage requirements of the array-dominated and loop-organized algorithmic specifications running on embedded systems can be significant. Employing a data memory space much larger than needed has negative consequences on the energy consumption, latency, and chip area. Finding an optimized storage of the usually large arrays from these algorithmic specifications is an important step during memory allocation. This paper proposes an efficient algorithm for mapping multi-dimensional arrays to the data memory. Similarly presented in R. Toncon et al., 2002, it computes bounding windows for live elements in the index space of arrays, but this algorithm is several times faster. Moreover, since this algorithm works not only for entire arrays, but also parts of arrays-like, for instance, array references or, more general, sets of array elements represented by lattices (Schrijver, 1986), this signal-to-memory mapping technique can be also applied in multi-layer memory hierarchies