DocumentCode :
2641118
Title :
The Impact of Loop Unrolling on Controller Delay in High Level Synthesis
Author :
Kurra, Srikanth ; Singh, Neeraj Kumar ; Panda, Preeti Ranjan
Author_Institution :
Dept. of Comp. Sc. & Engg., Indian Inst. of Technol., New Delhi
fYear :
2007
fDate :
16-20 April 2007
Firstpage :
1
Lastpage :
6
Abstract :
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in high level synthesis (HLS) unrolling can affect the controller complexity and delay. We study the effect of the loop unrolling factor on the delay of controllers generated during HLS. We propose a technique to predict controller delay as a function of the loop unrolling factor, and use this prediction with other search space pruning methods to automatically determine the optimal loop unrolling factor that results in a controller whose delay fits into a specified time budget, without an exhaustive exploration. Experimental results indicate delay predictions that are close to measured delays, yet significantly faster than exhaustive synthesis
Keywords :
data handling; delays; high level synthesis; optimising compilers; program control structures; compiler optimization; controller delay; delay predictions; high level synthesis; optimal loop unrolling; performance improvements; search space pruning; Automatic control; Automatic generation control; Circuit synthesis; Clocks; Delay effects; High level synthesis; Optimal control; Optimizing compilers; Pollution measurement; Q measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location :
Nice
Print_ISBN :
978-3-9810801-2-4
Type :
conf
DOI :
10.1109/DATE.2007.364623
Filename :
4211828
Link To Document :
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