A fast constrained optimization algorithm for IC design

A constrained optimization algorithm suited to integrated-circuit (IC) design is presented. In contrast to existing optimization methods in which the constraint functions are only linearized, the algorithm uses a recently developed method of using optimization history data to obtain, without extra simulation, a second-order approximation to both objective and constraint functions. In the new algorithm, the search direction created at each optimization iteration is based on this second-order approximation. As a result, the computational efficiency has been greatly improved compared with other constrained optimization methods in terms of the number of function evaluations required (a measure which is crucial in the context of IC design). The effectiveness and efficiency of the new algorithm have been demonstrated through numerical examples which are commonly used as benchmarks by existing optimization methods, and by several electronic circuit examples. In all cases encouraging results have been obtained