• DocumentCode
    2641539
  • Title

    Automatic Test Pattern Generation for Maximal Circuit Noise in Multiple Aggressor Crosstalk Faults

  • Author

    Ganeshpure, Kunal P. ; Kundu, Sandip

  • Author_Institution
    Massachusetts Univ., Amherst, MA
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Decreasing process geometries and increasing operating frequencies have made VLSI circuits more susceptible to signal integrity related failures. Capacitive crosstalk is one of the causes of such kind of failures. Crosstalk fault results from switching of neighboring lines that are capacitively coupled. Long nets are more susceptible to crosstalk faults because they tend to have a higher coupling capacitance to overall capacitance ratio. A typical long net has multiple aggressors. In generating patterns to create maximal crosstalk noise, it may not be possible to activate all aggressors at the same time. Therefore, pattern generation must focus on activating a maximal subset of aggressors weighted by actual coupling capacitance values. This is a variant of max-satisfiability problem. Unlike a traditional max-satisfiability problem, here we must deal with signal propagation to an observable output. In this paper, the authors present a novel solution that combines 0-1 integer linear program (ILP) with traditional stuck-at fault ATPG. The maximal aggressor activation is formulated as a linear programming problem while the fault effect propagation is treated as an ATPG problem. The problems are separated by min-cut circuit partitioning technique based on Kernighan-Lin-Fiduccia-Mattheyses (KLFM) method. This proposed technique was applied to ISCAS 85 benchmark circuits. Results indicated that 75-100% of the aggressors could be switched for generating crosstalk noise while satisfying requirement of sensitizing a path to the output
  • Keywords
    VLSI; automatic test pattern generation; computability; fault diagnosis; integer programming; integrated circuit noise; linear programming; Kernighan-Lin-Fiduccia-Mattheyses method; VLSI; automatic test pattern generation; capacitive crosstalk; crosstalk faults; integer linear programming; max-satisfiability problem; maximal circuit noise; multiple aggressors; signal integrity; stuck-at faults; Automatic test pattern generation; Capacitance; Circuit faults; Circuit noise; Coupling circuits; Crosstalk; Frequency; Geometry; Signal processing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364649
  • Filename
    4211854