DocumentCode :
2641589
Title :
Reversible Circuit Technology Mapping from Non-reversible Specifications
Author :
Zilic, Zeljko ; Radecka, Katarzyna ; Kazamiphur, A.
Author_Institution :
McGill Univ., Montreal, Que.
fYear :
2007
fDate :
16-20 April 2007
Firstpage :
1
Lastpage :
6
Abstract :
This paper considers the synthesis of reversible circuits directly from an irreversible specification, with no need for producing a reversible embedding first. The authors present a feasible methodology for realizing the networks of reversible gates, in a manner that builds on the classical technology mapping. We do not restrict ourselves to the restricted notion of realizing permutation functions, and construct reversible implementations where extraneous signals are efficiently reused for overcoming the inherent fanout limitation
Keywords :
logic circuits; logic design; logic gates; fanout limitation; reversible circuit technology; reversible gates; technology mapping; Circuits; Educational Activities Board;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location :
Nice
Print_ISBN :
978-3-9810801-2-4
Type :
conf
DOI :
10.1109/DATE.2007.364652
Filename :
4211857
Link To Document :
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