DocumentCode :
2641742
Title :
Routing wires with non-uniform width and spacing in data paths
Author :
Krishna, Bharat ; Chen, C. Y Roger ; Sehgal, Naresh K.
Author_Institution :
Mission Coll. Blvd., Santa Clara, CA, USA
fYear :
1999
fDate :
22-24 Nov. 1999
Firstpage :
85
Lastpage :
88
Abstract :
Datapath layout designs exhibit special layout properties in that most wires connect one stage to another and are straight wires. Use of track based routing algorithms suffices for the routing needs of the bit-lines. The left edge algorithm (LEA) may be used for this purpose. With the increase in performance requirements for deep sub-micron datapath designs, the use of nonuniform wire widths and spacing is becoming necessary and using LEA is not feasible. This paper defines the datapath bit-line assignment problem. We then present a heuristic algorithm that achieves optimal results in most test cases when the wire widths are nonuniform. The time complexity of our solution is O(NlogN), where N is the number of bit-wire segments to be assigned.
Keywords :
circuit CAD; computational complexity; integrated circuit interconnections; integrated circuit layout; network routing; bit-line routing; bit-wire segments; data paths; datapath bit-line assignment problem; datapath designs; datapath layout design; heuristic algorithm; layout properties; left edge algorithm; nonuniform wire spacing; nonuniform wire width; performance requirements; time complexity; track based routing algorithms; wire routing; wire widths; Crosstalk; Data engineering; Delay; Design engineering; Educational institutions; Heuristic algorithms; Routing; Signal design; Testing; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 1999. ICM '99. The Eleventh International Conference on
Print_ISBN :
0-7803-6643-3
Type :
conf
DOI :
10.1109/ICM.2000.884811
Filename :
884811
Link To Document :
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