Title :
A class-G dual-supply switched-capacitor power amplifier in 65nm CMOS
Author :
Yoo, Sang-Min ; Jann, Benjamin ; Degani, Ofir ; Rudell, Jacques C. ; Sadhwani, Ram ; Walling, Jeffrey S. ; Allstot, David J.
Author_Institution :
Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA
Abstract :
A digitally-controlled switched-capacitor RF power amplifier (SCPA) that uses a dual-supply voltage, class-G architecture is implemented in 65nm CMOS. It implements signal envelope digital-to-analog conversion using switching functions controlled by digital logic to achieve superior efficiency and linearity at output power backoff. The SCPA delivers a peak (average) output power of 24.3 (16.8) dBm with a peak (average) PAE of 44% (33%) for an IEEE 802.11g signal (64 QAM OFDM) with a measured EVM of 2.9 % in the 2.4 GHz band. No digital predistortion was necessary because of the superior linearity.
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; digital-analogue conversion; switched capacitor networks; CMOS process; EVM; IEEE 802.11g signal; PAE; QAM OFDM; class-G dual-supply switched-capacitor power amplifier; digital logic; digitally-controlled SCPA; digitally-controlled switched-capacitor RF power amplifier; efficiency 44 percent; frequency 2.4 GHz; signal envelope digital-to-analog conversion; size 65 nm; CMOS integrated circuits; Capacitors; Power amplifiers; Power generation; Radio frequency; Switches; Switching circuits; CMOS integrated circuits; EER; polar transmitters; power amplifiers; power combining circuits; switched-capacitor circuits;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4673-0413-9
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2012.6242271
