A WCDMA 41% power efficiency direct DC coupled hybrid CMOS/GaAs power amplifier with pre-distortion linearization

Author

Leipold, D. ; Allen, W. ; Sheehy, P. ; Hau, G.

Author_Institution

Warren Design Center, ANADIGICS, Inc., Warren, NJ, USA

fYear

2012

fDate

17-19 June 2012

Firstpage

279

Lastpage

282

Abstract

A 1710-1755MHz hybrid power amplifier module (PAM) consisting of a CMOS driver and a GaAs HBT output stage is described. By using multiple parallel CMOS driver stages the gain and bias current expansion needed to maintain the linearity into class C operation of the bipolar output stage is generated. This extends the linear output power range by 0.5 dBm and increases the power added efficiency (PAE) at ACLR1 of -40dBc from 39.0% at 28 dBm output power to 41.3% at 28.5 dBm output power for a WCDMA modulated signal. The PA achieves 43.5% PAE at 29 dBm Pout for an ACLR1 of -37 dBc with a gain of 26 dB and supply voltage of 3.4V.

Keywords

CMOS analogue integrated circuits; III-V semiconductors; UHF power amplifiers; code division multiple access; gallium arsenide; heterojunction bipolar transistors; wide band gap semiconductors; CMOS driver; HBT; PAM; WCDMA; bias current expansion; direct DC coupled hybrid CMOS-power amplifier; efficiency 39.0 percent to 41.3 percent; efficiency 43.5 percent; frequency 1710 MHz to 1755 MHz; gain 26 dB; parallel CMOS driver; power added efficiency; voltage 3.4 V; CMOS integrated circuits; Gain; Gallium arsenide; Heterojunction bipolar transistors; Impedance; Power amplifiers; Power generation; CMOS; GaAs; amplifier biasing; driver amplifiers; power amplifiers; pre-distortion;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE

Conference_Location

Montreal, QC

ISSN

1529-2517

Print_ISBN

978-1-4673-0413-9

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2012.6242281

Filename

6242281