DocumentCode
2642339
Title
A rail-to-rail 1-volt CMOS opamp
Author
Bahmani, Faramarz ; Fakhraie, S.M.
Author_Institution
Dept. of Electr. & Comput. Eng., Tehran Univ., Iran
fYear
1999
fDate
22-24 Nov. 1999
Firstpage
217
Lastpage
219
Abstract
A rail-to-rail 1-volt only, full-CMOS opamp is presented. The opamp has a complementary PMOS/bulk-driven input stage and a class AB output stage, which provide both input and output rail-to-rail operation. HSPICE simulations are performed using BSIM 3.3 models of a 0.8 μm CMOS process. This opamp has a DC gain of 45.1 dB, unity-gain bandwidth of 1.7 MHz and phase margin of 63.4.
Keywords
CMOS analogue integrated circuits; SPICE; circuit simulation; integrated circuit design; integrated circuit modelling; operational amplifiers; 0.8 micron; 1 V; 1.7 MHz; 45.1 dB; BSIM 3.3 models; CMOS opamp; CMOS process; DC gain; HSPICE simulations; class AB output stage; complementary PMOS/bulk-driven input stage; input rail-to-rail operation; opamp; output rail-to-rail operation; phase margin; rail-to-rail voltage; unity-gain bandwidth; Analog circuits; CMOS process; Circuit simulation; Fabrication; MOSFETs; Mirrors; Rail to rail operation; Semiconductor device modeling; Threshold voltage; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 1999. ICM '99. The Eleventh International Conference on
Print_ISBN
0-7803-6643-3
Type
conf
DOI
10.1109/ICM.2000.884844
Filename
884844
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