Top-Gate Dry-Etching Patterned Polymer Thin-Film Transistors With a Protective Layer on Top of the Channel

Photolithographic and dry-etching processes are developed to pattern the organic semiconductor (OSC) layer for top-gate organic thin-film transistors (OTFTs). A fluorine polymer layer is used to protect the OSC surface from the patterning processes so that the common photoresist can be used. The ON/OFF-current ratios of the patterned OTFTs are improved by about one order of magnitude compared with that of unpatterned devices. However, it is shown that removing the polymer protective layer can cause degraded subthreshold behavior due to increased interface trap density at the semiconductor/dielectric interface. A process without removing the polymer protective layer is thus developed to address this issue, and is shown to be able to provide a reliable route to achieve patterned top-gate OTFTs with high ON/OFF-current ratio, small subthreshold swing, and negligible hysteresis.