DocumentCode
2642538
Title
F-RISC/G: AlGaAs/GaAs HBT standard cell library
Author
Nah, K. ; Philhower, R. ; Van Etten, J.S. ; Simmons, S. ; Tsinker, V. ; Loy, J. ; Greub, H. ; McDonald, J.F.
Author_Institution
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
fYear
1991
fDate
14-16 Oct 1991
Firstpage
297
Lastpage
300
Abstract
A standard cell library for implementing Rensselaer´s fast reduced instruction set computer (F-RISC/G) project with Rockwell´s AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology is presented. The processor is targeted at an instruction cycle time of 1.0 ns. Differential current mode logic (CML) is used, and unloaded gate delays are 15-20 ps
Keywords
III-V semiconductors; aluminium compounds; bipolar integrated circuits; gallium arsenide; heterojunction bipolar transistors; microprocessor chips; reduced instruction set computing; 1 ns; AlGaAs-GaAs; AlGaAs/GaAs heterojunction bipolar transistor; F-RISC/G; differential current mode logic; fast reduced instruction set computer; instruction cycle time; standard cell library; unloaded gate delays; Circuits; Decoding; Delay; Gallium arsenide; Heterojunction bipolar transistors; Libraries; Logic gates; MESFETs; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-2270-9
Type
conf
DOI
10.1109/ICCD.1991.139902
Filename
139902
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